IDT 2007 - Call for Papers

CALL FOR PAPERS

Overview -- Author Information -- Committees

Overview

This event provides a unique forum to discuss novel approaches in design, automation and test in the Middle East and Africa (MEA) region for researchers and practitioners in the areas of VLSI design, test and fault tolerance to come together to discuss new research ideas and present new research results. This event will provide the only VLSI Design & Test-specific meeting in the MEA region. Workshop topics include all aspect of design, test and automation. Specific topics are to include:

Nanotechnology architectures
MEMs
Quantum computing
Mixed-signal and RF design
Circuit simulation and timing analysis
IC physical design automation
DFT
Test generation
Test simulation
iDDQ and iDDT testing
Defect-based test
Fault modeling
Test issues in nanotechnology
Built-In Self Test (BIST)
Power analysis and low power design
Design verification
Logic synthesis
Packaging
Design for manufacturability (DFM)
Memory and FPGA test and repair
SOC/NOC/MPSOC
Automatic test equipment
Analog and mixed-signal test
On-line testing
Test resource partitioning
Failure analysis
Fault tolerance
Economics of test

Author Information

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To present their work at the workshop, authors are invited to submit a full paper or extended summary of at least three pages of recent research or best current practices. Each submission should include: title, full name and affiliation of all authors, an abstract of 50 words, and keywords. It should also identify a contact author and include a complete correspondence address, phone number, fax number, and E-mail address. All submissions must be made electronically in PDF or Postscript format through the IDT website. Proposals for panels, hot topic sessions and embedded tutorials are also invited.

Please ensure that your PDF or Postscript file is readable by Acrobat Reader or Ghostview. The submission of a paper, a hot topic session or a panel proposal will be considered evidence that upon acceptance, the author(s) will present the paper or organize the panel at the workshop.

Submission Deadline: October 15th, 2007
Notification of Acceptance: October 30th, 2007
Deadline for Paper Inclusion in Workshop Digest: November 9th, 2007

Authors of accepted papers will be invited to submit their final manuscript, providing the name and contact
information of the presenting person, for inclusion in the Digest of Papers, which will be provided to the
attendees.

For general information:

GENERAL CO-CHAIRS

Hazem ElTahawy
Mentor Graphics - Egypt
51 Beirut St., Heliopolis,
Cairo, 11341, Egypt
T: +1-408-835-9040
E: hazem_eltahawy@mentor.com

Yervant Zorian
Virage Logic
47100 Bayside Parkway
Fremont CA, 94538, USA
T: +1-510-360-8035
F: +1-510-360-8099
E: zorian@viragelogic.com

Committees

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General Co-Chairs
Hazem ElTahawy – Mentor Graphics
Yervant Zorian – Virage Logic

Program Co-Chairs
Ashraf Salem – Mentor Graphics
Andre Ivanov – U. of British Columbia

Vice-General Co-Chairs
Magdy Abadir – Freescale
Magdy Bayoumi – U. of Louisiana at Lafayette
Rafic Makki – UAE University

Vice-Program Chair
Sultan Al-Harbi – Kuwait University

Publicity Chair
Bernard Courtois - TIMA

Panels Chair
Adam Osseiran – Edith Cowan University

Local Arrangements Chair
Marwa Zaghow – Mentor Graphics

Finance Chair
Watheq ElKharashi – Ain Shams University

Publications Chair
Muhamed Azimane – NXP Semiconductors

Asian Liaison
Quiang Xu – The Chinese U. of Hong Kong

European Liaison
Ahmed Jerraya – TIMA

North American Liaison
Alex Orailoglu – UCSD
Soha Hassoun – Tufts University

TTTC Liaison
Ibrahim Hajj – American University of Beirut

Program Committee (to include):
M. Abd-El-Barr – Kuwait University
J. Abraham – University of Texas at Austin
S. Adham – LogicVision
Z. Al-Ars – Delft University
M. Al-Failakawi – Kuwait University
B. Al-Hashimi – University of Southampton
F. Aloul – American University of Sharjah
G. Aly – SECC
A. Al-Yamani – KFUPM
L. Ammar – Atmel France
K. Arabi – PMC Sierra
D. Borrione – TIMA
L. Bouzaida – ST Microelectronics
A. Chehab – American University of Beirut
G. De Micheli – EPFL
K. ElAyat – American University in Cairo
H. ElHennawy – Ain Shams University
H. Elsimary – Electronics Research Institute
A. El-Maleh – KFUPM
H. Fikry – French University in Egypt
A. Ghonaimy – Ain Shams University
S. Goren – Bahcesehir University
S. Habib – Cairo University
M. Hafed – DFT Microsystems
S. Hamdioui – Delft University
J. Hayes – University of Michigan
Y. Ismail – Northwestern University
A. Kayssi – American University of Beirut
D. Keezer – Georgia Tech
F. Kurdahi – U. of California at Irvine
Y. Massoud – Rice University
S. Mirabbasi – University of British Columbia
A. Mohamed – Electronics Research Institute
S. Mourad – Santa Clara University
M. Nourani – University of Texas at Dallas
M. Pedram – U. of Southern California
C. Ravikumar – Texas Instruments
S. Reda – Brown University
K. Roy – Purdue University
N. Sabri – Ain Shams University
M. Slamani – IBM
M. Tehranipoor – University of Maryland
T. Williams – Synopsys
H. Wunderlich – Stuttgart University
Z. Zilic – McGill University

For more information, visit us on the web at: http://www.tttc-idt.org

The Second IEEE International Design and Test Workshop (IDT'07) is co-sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC) and technically co-sponsored by the IEEE Circuits & Systems Society.